Motorola MC14094BCP 8 Stage Shift/Store Register IC
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The MC14094B combines an 8stage shift register with a data latch for each stage and a threestate output from each latch.
Data is shifted on the positive clock transition and is shifted from the seventh stage to two serial outputs. The QS output data is for use in highspeed cascaded systems. The Q4S output data is shifted on the following negative clock transition for use in lowspeed cascaded systems.
Data from each stage of the shift register is latched on the negative
transition of the strobe input. Data propagates through the latch while strobe
Outputs of the eight data latches are controlled by threestate buffers
which are placed in the highimpedance state by a logic Low on Output